|
| Brand Name: | XSW PCB |
| Model Number: | XSWPCB |
| MOQ: | 1 |
| Price: | Negotiable |
| Payment Terms: | Western Union |
| Supply Ability: | 1 Million Square feet/per month |
| Layer Count | 4 |
| Material | FR4 |
| Board Thickness | 1.2mm |
| Copper Thickness | 1/1/1/1 oz |
| Minimum Hole Size | 0.2 mm three sides |
| Minimum Line Width | 0.1 mm |
| Minimum Line Spacing | 0.1 mm |
| Solder Mask Color | Green |
| Surface Finish | ENIG |
| Application Field | Module Board |
Product Description:
1. Processing Flow
The standard manufacturing process for castellated hole boards is as follows:
Drilling → Electroless Copper Deposition → Circuit Patterning → Panel Plating → First Routing (Mill out castellated hole areas) → Etching → Solder Mask → Legend Printing → Electrical Testing → Second Routing (Final Outline)
2. Key Technical Points
| Item | Requirements |
|---|---|
| Hole Alignment | The drilling center must be aligned with the castellated hole center on the same horizontal plane. The hole diameter should be drilled to intersect with the outline or be slightly smaller than the outline by ≤0.05mm. |
| Residual Copper Control | The process of "first drill castellated holes → route edge → then etch" effectively removes residual copper, ensuring a smooth, burr-free castellated hole wall. |
| Plating Uniformity | The "panel plating + pattern plating" process must be adopted. Pure electroless copper deposition is prohibited to ensure the hole wall plating is free from pinholes and missing plating. |
3. Solder Mask Special Treatment
| Parameter | Specification | Description |
|---|---|---|
| Solder Mask Clearance | ≥0.1mm (0.15mm recommended) | Solder mask ink is strictly prohibited from covering the metal wall of castellated holes |
| Solder Mask Thickness | 20-25μm | Slightly lower than conventional areas to avoid gaps during assembly |
| Opening Design | Solder mask opening 0.1-0.2mm larger than hole diameter | Ensures the hole wall is completely exposed |
Alternatively, a more concise version:
1. Processing Flow: Drilling → Electroless Copper → Circuit → Panel Plating → 1st Routing (castellated areas) → Etching → Solder Mask → Legend → Testing → 2nd Routing (final outline)
2. Key Technical Points:
Hole Alignment: Drill center must align with castellated hole center; hole diameter should intersect outline or be ≤0.05mm smaller
Residual Copper Control: "Drill → route → etch" sequence removes residual copper, ensuring smooth burr-free hole walls
Plating Uniformity: Panel plating + pattern plating required; pure electroless copper prohibited to prevent pinholes and missing plating
3. Solder Mask Special Treatment:
Clearance: ≥0.1mm (0.15mm recommended) – no ink on castellated metal walls
Thickness: 20-25μm – slightly lower to avoid assembly gaps
Opening: 0.1-0.2mm larger than hole diameter – ensures full exposure of hole wall
| Item | Mass Production Capability | Extreme Capability |
|---|---|---|
| Board Thickness Range | 0.3~6.0mm | 0.3~6.0mm |
| Exposure Alignment Accuracy | ±0.015mm | ±0.005mm |
| Minimum Annular Ring | Single side ≥0.05mm | Single side ≥0.05mm |
| Min Line Width/Space (1/3oz base copper) | 0.05mm / 0.05mm | 0.045mm / 0.045mm |
| Min Line Width/Space (1/2oz base copper) | 0.05mm / 0.05mm | 0.05mm / 0.05mm |
| Min Line Width/Space (1oz base copper) | 0.075mm / 0.075mm | 0.075mm / 0.075mm |
| Etching Tolerance (1/3oz base copper) | ±0.005mm | ±0.005mm |
| Etching Tolerance (1/2oz base copper) | ±0.005mm | ±0.005mm |
| Etching Tolerance (1oz base copper) | ±0.0075mm | ±0.0075mm |
| Gold Finger Total Pitch Tolerance | <30mm: ±0.05mm 30~60mm: ±0.075mm |
<30mm: ±0.03mm 30~60mm: ±0.05mm |
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